Fast and Precise WCET Prediction by Separated Cache andPath Analyses
Real-Time Systems - Special issue on worst-case execution-time analysis
Performance Analysis of Real-Time Embeded Software
Performance Analysis of Real-Time Embeded Software
A Dynamic Programming Algorithm for Cache Memory Partitioning for Real-Time Systems
IEEE Transactions on Computers
Data cache locking for higher program predictability
SIGMETRICS '03 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Low-Complexity Algorithms for Static Cache Locking in Multitasking Hard Real-Time Systems
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Extending the reach of microprocessors: column and curious caching
Extending the reach of microprocessors: column and curious caching
Real-Time Scheduling on Multicore Platforms
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
ECRTS '06 Proceedings of the 18th Euromicro Conference on Real-Time Systems
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Cache-aware scheduling and analysis for multicores
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Dataflow models for shared memory access latency analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Contention aware execution: online contention detection and response
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Journal of Systems Architecture: the EUROMICRO Journal
Instruction cache locking using temporal reuse profile
Proceedings of the 47th Design Automation Conference
Predictable task migration for locked caches in multi-core systems
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Loaf: a framework and infrastructure for creating online adaptive solutions
Proceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the 48th Design Automation Conference
Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC
Journal of Parallel and Distributed Computing
WCET-centric partial instruction cache locking
Proceedings of the 49th Annual Design Automation Conference
Static task partitioning for locked caches in multi-core real-time systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
PRETI: partitioned real-time shared cache for mixed-criticality real-time systems
Proceedings of the 20th International Conference on Real-Time and Network Systems
LP-NUCA: networks-in-cache for high-performance low-power embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Impact of resource sharing on performance and performance prediction: a survey
CONCUR'13 Proceedings of the 24th international conference on Concurrency Theory
DFTS: A dynamic fault-tolerant scheduling for real-time tasks in multicore processors
Microprocessors & Microsystems
Static analysis of multi-core TDMA resource arbitration delays
Real-Time Systems
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Multi-core architectures consisting of multiple processing cores on a chip have become increasingly prevalent. Synthesizing hard real-time applications onto these platforms is quite challenging, as the contention among the cores for various shared resources leads to inherent timing unpredictability. This paper proposes the use of shared cache in a predictable manner through a combination of locking and partitioning mechanisms. We explore possible design choices and evaluate their effects on the worst-case application performance. Our study reveals certain design principles that strongly dictate the performance of a predictable memory hierarchy.