PA-RISC 2.0 architecture

Instruction scheduling for the HP PA-8000

Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture

Data prefetching on the HP PA-8000

Proceedings of the 24th annual international symposium on Computer architecture

Simulation/evaluation environment for a VLIW processor architecture

IBM Journal of Research and Development - Special issue: performance analysis and its impact on design

Using “test model-checking” to verify the Runway-PA8000 memory model

Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures

Increasing TLB reach using superpages backed by shadow memory

Proceedings of the 25th annual international symposium on Computer architecture

Using interval arithmetic the calculate data sizes for compilation to multimedia instruction sets

MULTIMEDIA '98 Proceedings of the sixth ACM international conference on Multimedia

Exploiting instruction level parallelism in geometry processing for three dimensional graphics applications

MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture

An out-of-order execution technique for runtime binary translators

Proceedings of the eighth international conference on Architectural support for programming languages and operating systems

Hardware-only stream prefetching and dynamic access ordering

Proceedings of the 14th international conference on Supercomputing

Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions

IEEE Transactions on Computers

Subword Parallelism with MAX-2

IEEE Micro

Cache Remapping to Improve the Performance of Tiled Algorithms

Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing

Runtime Association of Software Prefetch Control to Memory Access Instructions (Research Note)

Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing

Reuse Distance-Based Cache Hint Selection

Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing

A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibility

ICS '03 Proceedings of the 17th annual international conference on Supercomputing

Fault tolerant clockless wave pipeline design

Proceedings of the 1st conference on Computing frontiers

Efficient instruction scheduling for a pipelined architecture

ACM SIGPLAN Notices - Best of PLDI 1979-1999

PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing

Journal of VLSI Signal Processing Systems

A fast implementation of DES and triple-DES on PA-RISC 2.0

WIESS'00 Proceedings of the 1st conference on Industrial Experiences with Systems Software - Volume 1

Implementation of multiple pagesize support in HP-UX

ATEC '98 Proceedings of the annual conference on USENIX Annual Technical Conference

Algorithm 867: QUADLOG—a package of routines for generating Gauss-related quadrature for two classes of logarithmic weight functions

ACM Transactions on Mathematical Software (TOMS)

A study of the performance potential for dynamic instruction hints selection

ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture