An investigation of the impact of technology scaling on power wasted as short-circuit current in low voltage static CMOS circuits

TEM2P2EST: A Thermal Enabled Multi-model Power/Performance ESTimator

PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers

Interconnect-power dissipation in a microprocessor

Proceedings of the 2004 international workshop on System level interconnect prediction

Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design

Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages

Proceedings of the 42nd annual Design Automation Conference

Area optimization for leakage reduction and thermal stability in nanometer scale technologies

ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference

Variation-aware adaptive voltage scaling system

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

A design-specific and thermally-aware methodology for trading-off power and performance in leakage-dominant CMOS technologies

IEEE Transactions on Very Large Scale Integration (VLSI) Systems