Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Instruction-processing optimization techniques for VLSI microprocessors
Instruction-processing optimization techniques for VLSI microprocessors
Low-power digital systems based on adiabatic-switching principles
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Energy recovery for the design of high-speed, low-power static RAMs
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Energy-recovery CMOS for highly pipelined DSP designs
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Design and analysis of a low-power energy-recovery adder
GLSVLSI '95 Proceedings of the Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
True single-phase energy-recovering logic for low-power, high-speed VLSI
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
An 8-b nRERL microprocessor for ultra-low-energy applications
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A true single-phase 8-bit adiabatic multiplier
Proceedings of the 38th annual Design Automation Conference
A resonant clock generator for single-phase adiabatic systems
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
A true single-phase energy-recovery multiplier
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Implementation of a simple 8-bit microprocessor with reversible energy recovery logic
Proceedings of the 2nd conference on Computing frontiers
Complexity reduction in an nRERL microprocessor
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
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