Routing tree topology construction to meet interconnect timing constraints

Authors:
Huibo Hou;Sachin S. Sapatnekar
Affiliations:
Department of ECE, Iowa State University, Ames, IA;Department of ECE, University of Minnesota, Minneapolis, MN
Venue:
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Year:
1998

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Abstract

This work presents a Steiner tree construction procedure, MVERT, to meet specified sink arrival time constraints. It is shown that the optimal tree requires the use of non-Hanan points. The procedure works in two phases: a minimum-delay Steiner tree is first constructed, after which the tree is iterativ ely modified, using an efficient binary search method, to reduce its length. Experimental results show that this procedure w orks particularly well for tec hnologies where the interconnect resistance dominates, and significant cost savings are generated.