Evolving computer programs using rapidly reconfigurable field-programmable gate arrays and genetic programming

  • Authors:

  • John R. Koza;Forest H. Bennett, III;Jeffrey L. Hutchings;Stephen L. Bade;Martin A. Keane;David Andre

  • Affiliations:

  • Computer Science Dept., Stanford University, Stanford, California;Computer Science Dept., Stanford University, Stanford, California;Convergent Design, L.L.C, 3221 E. Hollyhock Hill, Salt Lake City, UT;Convergent Design, L.L.C, 379 North, 900 East Orem, UT;Martin Keane Inc., 5733 West Grover, Chicago, Illinois;Computer Science Division, University of California, Berkeley, California

  • Venue:
  • FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
  • Year:
  • 1998

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Abstract

This paper describes how the massive parallelism of the rapidly reconfigurable Xilinx XC6216 FPGA (in conjunction with Virtual Computing's H.O.T. Works board) can be exploited to accelerate the time-consuming fitness measurement task of genetic algorithms and genetic programming. This acceleration is accomplished by embodying each individual of the evolving population into hardware in order to perform the fitness measurement task. A 16-step sorting network for seven items was evolved that has two fewer steps than the sorting network described in the 1962 O'Connor and Nelson patent on sorting networks (and the same number of steps as a 7-sorter that was devised by Floyd and Knuth subsequent to the patent and that is now known to be minimal). Other minimal sorters have been evolved.