High-speed FPGA-based implementations of a genetic algorithm

Authors:
Michalis Vavouras;Kyprianos Papadimitriou;Ioannis Papaefstathiou
Affiliations:
Department of Electronic and Computer Engineering, Technical University of Crete, Crete, Greece;Department of Electronic and Computer Engineering, Technical University of Crete, Crete, Greece;Department of Electronic and Computer Engineering, Technical University of Crete, Crete, Greece
Venue:
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Year:
2009

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Abstract

One very promising approach for solving complex optimizing and search problems is the Genetic Algorithm (GA) one. Based on this scheme a population of abstract representations of candidate solutions to an optimization problem gradually evolves toward better solutions. The aim is the optimization of a given function, the so called fitness function, which is evaluated upon the initial population as well as upon the solutions after successive generations. In this paper, we present the design of a GA and its implementation on state-of-the-art FPGAs. Our approach optimizes significantly more fitness functions than any other proposed solution. Several experiments on a platform with a Virtex-II Pro FPGA have been conducted. Implementations on a number of different high-end FPGAs outperforms other reconfigurable systems with a speedup ranging from 1.2x to 96.5x.