Computational geometry: an introduction
Computational geometry: an introduction
Journal of Algorithms
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Layout driven technology mapping
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Bottleneck Steiner Trees in the Plane
IEEE Transactions on Computers
A faster approximation algorithm for the Steiner tree problem in graphs
Information Processing Letters
NRG: global and detailed placement
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
TimberWolf3.2: a new standard cell placement and global routing package
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An Introduction to VLSI Physical Design
An Introduction to VLSI Physical Design
Improved Approximation Bounds for the Rectilinear Steiner Tree Problem
Improved Approximation Bounds for the Rectilinear Steiner Tree Problem
A Polynomial Time Approximation Scheme for the Grade of Service Steiner Minimum Tree Problem
Journal of Global Optimization
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
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We study the reproducing placement problem, which finds application in layout-driven logic synthesis. In each phase, a module (or gate) is decomposed into two (or more) simpler modules. The goal is to find a "good" placement in each phase. The problem, being iterative in nature, requires an iterative algorithm. In solving the RPP, we introduce the notion of minimum floating Steiner trees (MFST). We employ an MFST algorithm as a central step in solving the RPP. A Hanan-like theorem is established for the MFST problem, and two approximation algorithms are proposed. Experiments on commonly employed benchmarks verify the effectiveness of the proposed technique.