PHIDEO: high-level synthesis for high throughput applications
Journal of VLSI Signal Processing Systems - Special issue on design environments for DSP
Efficient timing constraint derivation for optimal retiming high speed processing units
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Constraint analysis for DSP code generation
ISSS '97 Proceedings of the 10th international symposium on System synthesis
MPEG Video Compression Standard
MPEG Video Compression Standard
Digital Video: An introduction to MPEG-2
Digital Video: An introduction to MPEG-2
Image and Video Compression Standards: Algorithms and Architectures
Image and Video Compression Standards: Algorithms and Architectures
PHIDEO: a silicon compiler for high speed algorithms
EURO-DAC '91 Proceedings of the conference on European design automation
IC for motion-compensated 100 Hz TV with natural-motion movie-mode
IEEE Transactions on Consumer Electronics
VLSI design of high-speed time-recursive 2-D DCT/IDCT processor for video applications
IEEE Transactions on Circuits and Systems for Video Technology
Multimedia Signal Processors: An Architectural Platform with Algorithmic Compilation
Journal of VLSI Signal Processing Systems - special issue on multimedia signal processing
Exploiting state equivalence on the fly while applying code motion and speculation
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DCT-Domain Embedded Memory Compression for Hybrid Video Coders
Journal of VLSI Signal Processing Systems - Special issue on recent advances in the design and implementation of signal processing systems
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Only very recently, single-chip MPEG2 video encoders are beingreported. They are a result of additional interest in encoding in consumerproducts, apart from broadcast encoding, where a video encoder containsseveral expensive chips. Only single-chip solutions are cost-effectiveenough to enable digital recording for the consumer. The professionalbroadcast encoders are expensive because they use the full MPEG toolkit toguarantee good image quality, at the lowest possible bit-rate. Some MPEGtools are costly in hardware and these are therefore not feasible insingle-chip solutions. This results in higher bit-rates, that can beaccepted because of the available channel and storage capacity of the latestconsumer storage media, harddisk, digital tape (D-VHS) and Digital VersatileDisk (DVD). A consumer product is I.McIC, a single-chip MPEG2 video encoder.It operates in ML@SP mode which can be decoded by all MPEG2 decoders.The IC is highly-integrated, as it contains motion-estimation andcompensation, adaptive temporal noise filtering and buffer/bit-rate control.The high-throughput functions of the MPEG algorithm are mapped ontopipelined dedicated hardware, whereas the remaining functions are processedby an application-specific instruction-set processor. Software for thisprocessor can be downloaded, in order to suit the IC for differentapplications and operating conditions. The IC consists of severalcommunicating processors which were designed using high-level synthesistools, PHIDEO and DSP Station™.