PHIDEO: high-level synthesis for high throughput applications
Journal of VLSI Signal Processing Systems - Special issue on design environments for DSP
Mpeg2 Video Encoding in Consumer Electronics
Journal of VLSI Signal Processing Systems - Special issue on recent development in video: algorithms, implementation and applications
System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
MPEG Video Compression Standard
MPEG Video Compression Standard
Low Power Digital CMOS Design
JPEG Still Image Data Compression Standard
JPEG Still Image Data Compression Standard
MTDT '95 Proceedings of the 1995 IEEE International Workshop on Memory Technology, Design and Testing
Low-complexity and high-throughput fully dct-based motion-compensated video coders
Low-complexity and high-throughput fully dct-based motion-compensated video coders
A fast algorithm for DCT-domain inverse motion compensation
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 04
DCT-based subpixel motion estimation
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 04
A DCT-based embedded image coder using wavelet structure of DCT for very low bit rate video codec
IEEE Transactions on Consumer Electronics
An MPEG decoder with embedded compression for memory reduction
IEEE Transactions on Consumer Electronics
IEEE Transactions on Image Processing
A new, fast, and efficient image codec based on set partitioning in hierarchical trees
IEEE Transactions on Circuits and Systems for Video Technology
Low-Complexity Scalable Image Compression
DCC '00 Proceedings of the Conference on Data Compression
HW-SW Co-Design and Verification of a Multi-Standard Video and Image Codec
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
A low-cost and low-power multi-standard video encoder
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
An Efficient Picture-Rate Up-Converter
Journal of VLSI Signal Processing Systems
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Hybrid video compression schemes such as MPEG2 and H.263use an image memory for motion-compensated coding. In VLSIimplementations, this image is usually stored in external RAM becauseof its large size. To reduce the overall system costs, we propose tocompress the image by a factor of 4 to 5 before storage, which thenenables embedding of the image memory on the encoder IC itself. Theproposed encoder architecture remains in the DCT-domain, so motionestimation and compensation are now performed from this domain. Tocontrol and guarantee the actual storage, scalable compression isused. A hardware implementation is feasible and worthwhile comparedto traditional encoders with no noticeable loss in performance.