A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
Gross delay defect evaluation for a CMOS logic design system product
IBM Journal of Research and Development
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Transition Fault Simulation for Sequential Circuits
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
EBT: A comprehensive test generation technique for highly sequential circuits
DAC '78 Proceedings of the 15th Design Automation Conference
SCOAP: Sandia controllability/observability analysis program
DAC '80 Proceedings of the 17th Design Automation Conference
Design for testability for path delay faults in sequential circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
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