Hierarchical test generation under intensive global functional constraints
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
VHDL, Hardware Description and Design
VHDL, Hardware Description and Design
Design for Testability Using Architectural Descriptions
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
An Instruction Sequence Assembling Methodology for Testing Microprocessors
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
High level test generation using data flow descriptions
EURO-DAC '90 Proceedings of the conference on European design automation
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Non-scan design-for-testability of RT-level data paths
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Enhancing high-level control-flow for improved testability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Low-cost sequential ATPG with clock-control DFT
Proceedings of the 39th annual Design Automation Conference
Testability Insertion in Behavioral Descriptions
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Improve the Quality of Per-Test Fault Diagnosis Using Output Information
Journal of Electronic Testing: Theory and Applications
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