Journal of the ACM (JACM)
Automatic generation of cells for recurrence structures
DAC '81 Proceedings of the 18th Design Automation Conference
Compilation of register transfer language descriptions into silicon
Compilation of register transfer language descriptions into silicon
A Regular Layout for Parallel Adders
IEEE Transactions on Computers
An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines
IEEE Transactions on Computers
The Strict Time Lower Bound and Optimal Schedules for Parallel Prefix with Resource Constraints
IEEE Transactions on Computers
Constructing H4, a Fast Depth-Size Optimal Parallel Prefix Circuit
The Journal of Supercomputing
Z4: a new depth-size optimal parallel prefix circuit with small depth
Neural, Parallel & Scientific Computations
A new approach to constructing optimal parallel prefix circuits with small depth
Journal of Parallel and Distributed Computing
Faster optimal parallel prefix circuits: New algorithmic construction
Journal of Parallel and Distributed Computing
On the construction of zero-deficiency parallel prefix circuits with minimum depth
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reconfigurable hardware solution to parallel prefix computation
The Journal of Supercomputing
Computation-efficient parallel prefix
AIC'06 Proceedings of the 6th WSEAS International Conference on Applied Informatics and Communications
Straightforward construction of depth-size optimal, parallel prefix circuits with fan-out 2
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Parallel prefix algorithms on the multicomputer
WSEAS Transactions on Computer Research
Fast problem-size-independent parallel prefix circuits
Journal of Parallel and Distributed Computing
New parallel prefix algorithms
AIC'09 Proceedings of the 9th WSEAS international conference on Applied informatics and communications
New families of computation-efficient parallel prefix algorithms
WSEAS Transactions on Computers
Hi-index | 14.98 |
The suffix problem has appeared in solutions of recurrence systems for parallel and pipelined machines and more recently in the design of gate and silicon compilers. In this paper we present two algorithms. The first algorithm generates parallel suffix solutions with minimum cost for a given length, time delay, availability of initial values, and fanout. This algorithm generates a minimal solution for any length n and depth range from log2 n to n. The second algorithm reduces the size of the solutions generated by the first algorithm.