Fast problem-size-independent parallel prefix circuits

  • Authors:

  • Yen-Chun Lin;Li-Ling Hung

  • Affiliations:

  • Department of Computer Science and Information Engineering, National Taiwan University of Science and Technology, 43 Keelung Road, Sec. 4, Taipei 106, Taiwan;Department of Computer Science and Information Engineering, National Taiwan University of Science and Technology, 43 Keelung Road, Sec. 4, Taipei 106, Taiwan

  • Venue:
  • Journal of Parallel and Distributed Computing
  • Year:
  • 2009

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Abstract

A family of parallel algorithms solving the prefix problem on the combinational circuit model is presented. These prefix circuits are waist-size optimal with waist 1 (WSO-1). They are not only building blocks for constructing fast depth-size optimal prefix circuits, but also themselves fast problem-size-independent prefix circuits. When the problem size is greater than the circuit width, the presented prefix circuits may very much faster than any other prefix circuits of the same width, especially when the problem size is greater than or equal to twice the circuit width. The new prefix circuits are compared analytically with other representative prefix circuits to show how fast they are. They have the minimum depth and are the fastest among all WSO-1 prefix circuits of the same width and fan-out. Thus, they are better building blocks than other WSO-1 circuits for constructing fast depth-size optimal prefix circuits with the same fan-out.