Transistor level test generation for MOS circuits
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Test generation for MOS circuits using D-algorithm
DAC '83 Proceedings of the 20th Design Automation Conference
A data structure for MOS circuits
DAC '83 Proceedings of the 20th Design Automation Conference
STAFAN: An alternative to fault simulation
DAC '84 Proceedings of the 21st Design Automation Conference
Test generation costs analysis and projections
DAC '80 Proceedings of the 17th Design Automation Conference
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A Fault coverage estimation technique for mixed-level circuit is described. Observability formulae for combinational multiple-input multiple-output functional block are derived. Special procedures for estimating CMOS circuit transistor fault detection probability are developed, and the implementation of a FAult Coverage Estimation (FACE) system is described.