The Elmore delay as bound for RC trees with generalized input signals
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Calculating worst-case gate delays due to dominant capacitance coupling
DAC '97 Proceedings of the 34th annual Design Automation Conference
Efficient coupled noise estimation for on-chip interconnects
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Analysis, reduction and avoidance of crosstalk on VLSI chips
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Design methodologies for noise in digital integrated circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
PRIMO: probability interpretation of moments for delay calculation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Simulation of coupling capacitances using matrix partitioning
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Determination of worst-case aggressor alignment for delay calculation
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Predicting coupled noise in RC circuits
DATE '00 Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Capturing crosstalk-induced waveform for accurate static timing analysis
Proceedings of the 2003 international symposium on Physical design
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This paper develops the noise-counterparts to familiar delay formulas like Elmore or PRIMO. By matching the first few moments of the network's transfer impedance, we obtain efficient and accurate predictions for maximum noise between two capacitively coupled RC networks. Unlike many crosstalk equations in the literature, the method applies to general topologies and models transition-time dependence as well. Efficient enough for large circuits, the moment-matching noise formulas developed here can serve as a key ingredient in CAD methodologies that ensure a layout is free of noise problems.