VLSI implementation of public-key encryption algorithms

Authors:
G. A. Orton;M. P. Roy;P. A. Scott;L. E. Peppard;S. E. Tavares
Affiliations:
Queen's Univ., Kingston, Ont., Canada;Bell Northern Research, Ottawa, Ont., Canada;Queen's Univ., Kingston, Ont., Canada;Queen's Univ., Kingston, Ont., Canada;Queen's Univ., Kingston, Ont., Canada
Venue:
Proceedings on Advances in cryptology---CRYPTO '86
Year:
1987

Citing 9
Cited 7

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Abstract

This paper describes some recently successful results in the CMOS VLSI implementation of public-key data encryption algorithms. Architectural details, circuits, and prototype test results are presented for RSA encryption and multiplication in the finite field GF(2m). These designs emphasize high throughput and modularity. An asynchronous modulo multiplier is described which permits a significant improvement in RSA encryption throughput relative to previously described synchronous implementations.