Hierarchical design based on a calculus of nets

Authors:
B. Becker;G. Hotz;R. Kolla;P. Molitor;H.-G. Osthof
Affiliations:
Fachbereich 10, Universität des Saarlandes, D-6600 Saarbrücken, FRG;Fachbereich 10, Universität des Saarlandes, D-6600 Saarbrücken, FRG;Fachbereich 10, Universität des Saarlandes, D-6600 Saarbrücken, FRG;Fachbereich 10, Universität des Saarlandes, D-6600 Saarbrücken, FRG;Fachbereich 10, Universität des Saarlandes, D-6600 Saarbrücken, FRG
Venue:
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Year:
1987

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Abstract

We present an algebraic approach to hierarchical design of integrated circuits. This approach is based on a “calculus of nets” which includes topological as well as behavioural aspects of integrated circuits. We have developed a hierarchical design system called CADIC which is build around this calculus in much the same way as e.g. Algol is build around numerics. An example for the design of a family of fast adders will demonstrate the power of this calculus. Finally we will give a summary outline on the structure of procedures which automatically transform the design into lower design levels.