Telecommunication networks: protocols, modeling and analysis
Telecommunication networks: protocols, modeling and analysis
PROPHID: a data-driven multi-processor architecture for high-performance DSP
EDTC '97 Proceedings of the 1997 European conference on Design and Test
PROPHID: a heterogeneous multi-processor architecture for multimedia
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Memory arbitration and cache management in stream-based systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Journal of VLSI Signal Processing Systems
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Mapping array communication onto FIFO communication - towards an implementation
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Codesign of embedded systems: status and trends
Readings in hardware/software co-design
Codesign of Embedded Systems: Status and Trends
IEEE Design & Test
Guaranteeing the quality of services in networks on chip
Networks on chip
Multi-level software validation for NOC
Networks on chip
Automatic synthesis of system on chip multiprocessor architectures for process networks
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing architectures can deliver. The Prophid heterogeneous multiprocessor architecture template aims to bridge this gap. The template contains a general purpose processor connected to a central bus, as well as several high-performance application domain specific processors. A high-throughput communication network is used to meet the high bandwidth requirements between these processors. In this network multiple time-division-multiplexed data streams are transferred over several parallel physical channels. This paper presents a method for guaranteeing the throughput for hard-real-time streams in such a network. At compile time sufficient bandwidth is assigned to these streams. The assignment can be determined in polynomial time. Remaining bandwidth is assigned to soft-real-time streams at run time. We thus achieve efficient stream communication with guaranteed performance.