Semi-formal test generation with genevieve

  • Authors:
  • Julia Dushina;Mike Benjamin;Daniel Geist

  • Affiliations:
  • STMicroelectronics, 1000 Aztec West, Bristol BS32 4SQ, UK;STMicroelectronics, 1000 Aztec West, Bristol BS32 4SQ, UK;IBM Corp, MATAM, Haifa, Israel

  • Venue:
  • Proceedings of the 38th annual Design Automation Conference
  • Year:
  • 2001

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Abstract

This paper describes the first application of the Genevieve test generation methodology. The Genevieve approach uses semi-for-mal techniques derived from “model-checking” to generate test suites for specific behaviours of the design under test. An “interest-ing” behaviour is claimed to be unreachable. If a path from an ini-tial state to the state of interest does exist, a counter-example is generated. The sequence of states specifies a test for the desired behaviour.To highlight real problems that could appear during test genera-tion, we chose the Store Data Unit (SDU) of the ST100, a new high performance digital signal processor (DSP) developed by STMi-croelectronics. This unit is specifically selected because of the fol-lowing key issues: big data structures that can not be directly modelled without state explosion, complex control logic that would require an excessive number of tests to exercise exhaustively, a design where it is difficult to determine how to drive the com-plete system to ensure a given behaviour in the unit under test.The Genvieve methodology allowed us to define a coverage model specifically devoted to covering corner cases of the design. Hence the generated test suite achieved very efficient coverage of corner cases, and checked not only functional correctness but also whether the implementation matched design intent. As a result the Genevieve tests discovered some subtle performance bugs which would otherwise be very difficult to find.