Communications of the ACM
The design of an asynchronous microprocessor
Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
Analyzing cycle stealing on synchronous circuits with level-sensitive latches
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Self-timed rings and their application to division
Self-timed rings and their application to division
Parallel Algorithms and Architectures for DSP Applications
Parallel Algorithms and Architectures for DSP Applications
VLSI '93 Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration
High-Performance Asynchronous Pipeline Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Dynamic Logic in Four-Phase Micropipelines
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '97 Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Design of a reconfigurable cryptographic engine
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
| Hi-index | 14.98 |
In this paper, we present a new configuration of an asynchronous micropipeline, called Locally Distributed Asynchronous (LDA) micropipeline, using a new control circuit. The control circuit generates local control signals according to the 4-phase signaling protocol. The control circuit is used to control the dynamic logic in the datapath. Comparisons based on simulations with other earlier published asynchronous micropipelines are also presented.