A parallel pipelined processor with conditional instruction execution
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
A low-cost usage-based replacement algorithm for cache memories
ACM SIGARCH Computer Architecture News
A class of replacement policies for medium and high-associativity structures
ACM SIGARCH Computer Architecture News
A process-dependent partitioning strategy for cache memories
ACM SIGARCH Computer Architecture News
Memory tracing of algebraic calculations
ISSAC '96 Proceedings of the 1996 international symposium on Symbolic and algebraic computation
AMULET1: An Asynchronous ARM Microprocessor
IEEE Transactions on Computers
Specification and verification of pipelining in the ARM2 RISC microprocessor
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Practical Methodology for the Formal Verification of RISC Processors
Formal Methods in System Design
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Thumb: Reducing the Cost of 32-bit RISC Performance in Portable and Consumer Applications
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
ARM7100 - A High Integration, Low Power Microcontroller for PDA Applications
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Specifying and property checking the AMULET1 address interface
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
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