Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Minimum length synchronizing sequences of finite state machine
DAC '93 Proceedings of the 30th international Design Automation Conference
Genetic algorithms for VLSI design, layout & test automation
Genetic algorithms for VLSI design, layout & test automation
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
RT-Level ITC'99 Benchmarks and First ATPG Results
IEEE Design & Test
On the Initialization of Sequential Circuits
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Initialization of sequential circuits and its application to ATPG
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
On the (non-)resetability of synchronous sequential circuits
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
A new approach for initialization sequences computation for synchronous sequential circuits
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
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This article addresses the problem of initializing synchronous sequential circuits, that is, of generating the shortest sequence able to drive the circuit to a known state, regardless of the initial state. Logic initialization is considered, being the only one compatible with current commercial tools. A hybrid Genetic Algorithm is proposed, which combines general ideas from evolutionary computation with specific techniques, well suited to the addressed problem. For the first time, experimental results provide data about the complete set of ISCAS'89 circuits, and show that, despite the inherent algorithm incompleteness, the method is capable of finding the optimum result for the considered circuits. A prototypical tool implementing the algorithm found better results than previous methods.