Characterization of Floating Gate Defects in Analog Cells
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
Analog and Mixed-Signal Benchmark Circuits-First Release
Proceedings of the IEEE International Test Conference
Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Optimal Conditions for Boolean and Current Detection of Floating Gate Faults
ITC '99 Proceedings of the 1999 IEEE International Test Conference
BIST for Phase-Locked Loops in Digital Applications
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Analog circuit test based on a digital signature
Proceedings of the Conference on Design, Automation and Test in Europe
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A new Built-In Self-Test structure, based on the information provided by the XY-operation (Lissajous curves) is introduced in this paper. A Digital Signature is obtained which is used to discriminate catastrophic as well as parametric defects. High Fault Coverage is achieved when applying the proposed BIST on an ITC'97 benchmark circuit where 92% of the catastrophic defects and 87.5% of the parametric defects analyzed produced digital signatures clearly distinguishable from the golden signature.