Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS

The Design and Implementation of an On-Line Testable UART

Journal of Electronic Testing: Theory and Applications

A one-bit-signature BIST for embedded operational amplifiers in mixed-signal circuits based on the slew-rate detection

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Characterization of Floating Gate Defects in Analog Cells

Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop

On Maximizing the Coverage of Catastrophic and Parametric Faults

Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999

An Analog Self-Test Based on Differential I_{\tf="P6965" DD} Monitoring Supported by Differential I_{\tf="P6965"OUT} Checking

Analog Integrated Circuits and Signal Processing - Special issue on selected papers from ECS '97

Dynamic Power Supply Current Testing of CMOS SRAMs

Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98

Accurate CMOS bridge fault modeling with neural network-based VHDL saboteurs

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

Digital Signature Proposal for Mixed-Signal Circuits

Journal of Electronic Testing: Theory and Applications

Fault security analysis of CMOS VLSI circuits using defect-injectable VHDL models

Integration, the VLSI Journal

Toward understanding "Iddq-only" fails

ITC '98 Proceedings of the 1998 IEEE International Test Conference

CMOS IC reliability indicators and burn-in economics

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Power supply current detectability of SRAM defects

ATS '95 Proceedings of the 4th Asian Test Symposium

Synthesis of I/sub DDQ/-testable circuits: integrating built-in current sensors

EDTC '95 Proceedings of the 1995 European conference on Design and Test

Analysis of ISSQ/IDDQ Testing Implementation and Circuit Partitioning in CMOS Cell-Based Design

EDTC '96 Proceedings of the 1996 European conference on Design and Test

A Production-Oriented Measurement Method for Fast and Exhaustive Iddq Tests

EDTC '97 Proceedings of the 1997 European conference on Design and Test

Comparison of Defect Detection Capabilities of Current-Based and Voltage-Based Test Methods

ETW '00 Proceedings of the IEEE European Test Workshop

Comparison of Defect Detection Capabilities of Current-Based and Voltage-Based Test Methods

ETW '00 Proceedings of the IEEE European Test Workshop

Testing Analogue Circuits by A C Power Supply Voltage

VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication

17.2 A Design for Testability Study on a High Performance Automatic Gain Control Circuit

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium

A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium

Test Method Evaluation Experiments & Data

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Digital Signature Proposal for Mixed-Signal Circuits

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Boolean and Current Detection of MOS Transistor with Gate Oxide Short

ITC '01 Proceedings of the 2001 IEEE International Test Conference

Current Signatures: Application

ITC '97 Proceedings of the 1997 IEEE International Test Conference

IDDQ Characterization in Submicron CMOS

ITC '97 Proceedings of the 1997 IEEE International Test Conference

Current Signatures: Application

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short

Journal of Electronic Testing: Theory and Applications

A compact DC model of gate Oxide short defect

Microelectronic Engineering - Special issue: Proceedings of the 13th biennial conference on insulating films on semiconductors

Delay testing viability of gate oxide short defects

Journal of Computer Science and Technology

Automatic generation of defect injectable VHDL fault models for ASIC standard cell libraries

Integration, the VLSI Journal

Criteria for static current estimation: how good are they? an approach incorporating IC quality requirements

SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design

Residual charge on the faulty floating gate MOS transistor

ITC'94 Proceedings of the 1994 international conference on Test

System-level impact of chip-level failure mechanisms and screens

Proceedings of the International Conference on Computer-Aided Design