Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Testing of static random access memories by monitoring dynamic power supply current
Journal of Electronic Testing: Theory and Applications
IDDT Testing versus IDDQ Testing
Journal of Electronic Testing: Theory and Applications
Exploring the combination of IDDQ and iDDt testing: energy testing
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Test Generation for Current Testing (CMOS ICs)
IEEE Design & Test
Transient Power Supply Current Testing of Digital CMOS Circuits
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Towards an Effective IDDQ Test Vector Selection and Application Methodology
Proceedings of the IEEE International Test Conference on Test and Design Validity
Correlating Defects to Functional and IDDQ Tests
Proceedings of the IEEE International Test Conference on Test and Design Validity
Emerging Technologies Drive Domain-Specific Solutions
Proceedings of the IEEE International Test Conference on Test and Design Validity
Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Diagnosis method based on /spl Delta/Iddq probabilistic signatures: experimental results
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Defect level prediction for I_DDQ testing
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Statistical Threshold Formulation For Dynamic Idd Test
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Defect Detection using Power Supply Transient Signal Analysis
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Transient Current Testing of 0.25 µm CMOS Devices
ITC '99 Proceedings of the 1999 IEEE International Test Conference
IDDT: fundamentals and test generation
Journal of Computer Science and Technology
Testing and Reliability Techniques for High-Bandwidth Embedded RAMs
Journal of Electronic Testing: Theory and Applications
An indirect current sensing technique for IDDQ and IDDT tests
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
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We describe the design and implementation of a dynamic power supply current sensor which is used to detect SRAM faults such as disturb faults as well as logic cell faults. A formal study is presented to assess the parameters that influence the sensor design. The sensor detects faults by detecting abnormal levels of the power supply current. The sensor is embedded in the SRAM and offers on-chip detectability of faults. The sensor detects abnormal dynamic current levels that result from circuit defects. If two or more memory cells erroneously switch as a result of a write or read operation, the level of the dynamic power supply current is elevated. The sensor can detect this elevated value of the dynamic current. The dynamic power supply current sensor can supplement the observability associated with any test algorithm by using the sensor as a substitute for the read operations. This significantly reduces the test length and the additional observability enhances defect coverages.