Test Generation for Current Testing (CMOS ICs)

Authors:
Phil Nigh;Wojciech Maly
Affiliations:
-;-
Venue:
IEEE Design & Test
Year:
1990

Citing 5
Cited 26

COSMOS: a compiled simulator for MOS circuits

DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Test pattern generation for sequential MOS circuits by symbolic fault simulation

DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Built-in current testing

Built-in current testing
Testing for bridging faults (shorts) in CMOS circuits

DAC '83 Proceedings of the 20th Design Automation Conference
An O (N log N) algorithm for Boolean mask operations

DAC '81 Proceedings of the 18th Design Automation Conference

Algorithms for current monitor based diagnosis of bridging and leakage faults

DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Random current testing for CMOS logic circuits by monitoring a dynamic power supply current

EURO-DAC '92 Proceedings of the conference on European design automation
Test generation for IDDQ testing and leakage fault detection in CMOS circuits

EURO-DAC '92 Proceedings of the conference on European design automation
Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring

ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Analysis of switch-level faults by symbolic simulation

DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits

IEEE Transactions on Computers
Algorithms to compute bridging fault coverage of IDDQ test sets

ACM Transactions on Design Automation of Electronic Systems (TODAES)
IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays

IEEE Transactions on Computers
Design and Realization of a Built-In Current Sensor for I_DDQ Testing and Power Dissipation Measurement

Analog Integrated Circuits and Signal Processing
Dynamic Power Supply Current Testing of CMOS SRAMs

Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
Analog test design with IDD measurements for the detection of parametric and catastrophic faults

Proceedings of the conference on Design, automation and test in Europe
IDDQ Test and Diagnosis of CMOS Circuits

IEEE Design & Test
A Unified Design Methodology for Offline and Online Testing

IEEE Design & Test
Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ

ITC '98 Proceedings of the 1998 IEEE International Test Conference
Replacing IDDQ Testing: With Variance Reduction

Journal of Electronic Testing: Theory and Applications
Power supply current detectability of SRAM defects

ATS '95 Proceedings of the 4th Asian Test Symposium
Deep Sub-Micron IDDQ Testing: Issues and Solutions

EDTC '97 Proceedings of the 1997 European conference on Design and Test
Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using I/sub DDQ/ Testing in BiCMOS and CMOS Circuits

VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Bridges in sequential CMOS circuits: current-voltage signature

VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
On the Comparison of IDDQ and IDDQ Testing

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Design and Realization of an Accurate Built-In Current Sensor Design and Realization of an Accurate Built-In Current Sensor and lddq Testing

ITC '97 Proceedings of the 1997 IEEE International Test Conference
An Histogram Based Procedure for Current Testing of Active Defects

ITC '99 Proceedings of the 1999 IEEE International Test Conference
IDDX-based test methods: A survey

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks

Journal of Electronic Testing: Theory and Applications
Criteria for static current estimation: how good are they? an approach incorporating IC quality requirements

SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
A study of IDDQ subset selection algorithms for bridging faults

ITC'94 Proceedings of the 1994 international conference on Test

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Abstract

Current testing is useful for testing CMOS ICs because it can detect a large class of manufacturing defects, including defects that traditional stuck-at fault testing misses. The effectiveness of current testing can be enhanced if built-in current sensors are applied on-chip to monitor defect-related abnormal currents in the power supply buses. Such sensors have proved effective for built-in self-test. However, current testing requires the use of a special method to generate test vectors. The authors describe this method, which differs from that for traditional voltage-oriented testing, and postulate a test-generation algorithm for both on-chip and off-chip current testing. The algorithm uses realistic fault models extracted directly from the circuit layout.