Failure Diagnosis of Structured VLSI
IEEE Design & Test
Test Generation for Current Testing (CMOS ICs)
IEEE Design & Test
Fault Location with Current Monitoring
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Location of Stuck-At Faults and Bridging Faults Based on Circuit Partitioning
IEEE Transactions on Computers
Modeling the unknown! Towards model-independent fault and error diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Replacing IDDQ Testing: With Variance Reduction
Journal of Electronic Testing: Theory and Applications
A simple technique for locating gate-level faults in combinational circuits
ATS '95 Proceedings of the 4th Asian Test Symposium
On the Comparison of IDDQ and IDDQ Testing
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Current Signatures: Application
ITC '97 Proceedings of the 1997 IEEE International Test Conference
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Current Signatures: Application
ITC '98 Proceedings of the 1998 IEEE International Test Conference
An Histogram Based Procedure for Current Testing of Active Defects
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Fault Diagnosis and Fault Model Aliasing
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Selection of a fault model for fault diagnosis based on unique responses
Proceedings of the Conference on Design, Automation and Test in Europe
Selection of a fault model for fault diagnosis based on unique responses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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