Applied multivariate statistical analysis
Applied multivariate statistical analysis
Algorithms for current monitor based diagnosis of bridging and leakage faults
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Design for manufacturability in submicron domain
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Yiel Learning via Functional Test Data
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
IDDQ Test: Sensitivity Analysis of Scaling
Proceedings of the IEEE International Test Conference on Test and Design Validity
An Overview of CMOS VLSI Failure Analysis and the Importance of Test and Diagnostics
Proceedings of the IEEE International Test Conference on Test and Design Validity
Modelling the Unmodellable: Algorithmic Fault Diagnosis
Proceedings of the IEEE International Test Conference on Test and Design Validity
Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
So What Is an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment
Proceedings of the IEEE International Test Conference
Application and Analysis of IDDQ Diagnostic Software
Proceedings of the IEEE International Test Conference
Current signatures [VLSI circuit testing]
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
On estimating bounds of the quiescent current for I/sub DDQ/ testin
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Current Signatures for Production Testing
IDDQ '96 Proceedings of the 1996 IEEE International Workshop on IDDQ Testing (IDDQ '96)
Graphical IDDQ signatures reduce defect level and yield loss
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Quality improvement and cost reduction using statistical outlier methods
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
| Hi-index | 0.00 |
Analysis of IC technology trends indicates that Iddq testingmay be approaching its limits of applicability. The new conceptof the current signature may expand this limit underthe condition that an appropriate current-signature-basedtest methodology is developed. This paper is a first steptoward such a goal. It is focused on current signature stepdetection in a noisy test environment. Application of currentsignatures in die selection and defect diagnosis is discussedas well.