Realistic fault modeling for VLSI testing
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
E-PROOFS: a CMOS bridging fault simulator
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Algorithms for current monitor based diagnosis of bridging and leakage faults
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
An algorithm for diagnosing two-line bridging faults in combinational circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Diagnosis of realistic bridging faults with single stuck-at information
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Finding Defects with Fault Models
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Beyond the Byzantine Generals: Unexpected Behaviour and Bridging Fault Diagnosis
Proceedings of the IEEE International Test Conference on Test and Design Validity
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Biased Voting: A Method for Simulating CMOS Bridging Faults in the Presence of Variable Gate Logic
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Fault diagnosis using state information
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Dynamic diagnosis of sequential circuits based on stuck-at faults
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
IEEE Transactions on Computers
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A diagnosis technique that integrates the storage of precomputedinformation with some dynamic computation forthe diagnosis of bridging faults in synchronous sequentialcircuits with no-scan or partial-scan is presented. Themethod addresses the accuracy, storage requirements, andcomputational complexity required for diagnosis. A combinationof adaptively simulating the behavior of a bridgingfault and storing faulty state information at select vectorsensures accuracy with low storage requirements. Thecombination of adaptive simulation, state storage, and pathtracinghas low computational requirements. Experimentalresults are provided for the ISCAS89 benchmark circuits.