Dynamic diagnosis of sequential circuits based on stuck-at faults

Authors:
S. Venkataraman;I. Hartanto;W. Kent Fuchs
Affiliations:
-;-;-
Venue:
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Year:
1996

Citing 0
Cited 14

On a model-based diagnosis for synchronous boolean network

IEA/AIE '00 Proceedings of the 13th international conference on Industrial and engineering applications of artificial intelligence and expert systems: Intelligent problem solving: methodologies and approaches
Poirot: Applications of a Logic Fault Diagnosis Tool

IEEE Design & Test
Modeling the unknown! Towards model-independent fault and error diagnosis

ITC '98 Proceedings of the 1998 IEEE International Test Conference
Fault diagnosis using state information

FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
3.2 A New Path Tracing Algorithm with Dynamic Circuit Extraction for Sequential Circuit Fault Diagnosis

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
An Improved Fault Diagnosis Algorithm Based on Path Tracing with Dynamic Circuit Extraction

ITC '00 Proceedings of the 2000 IEEE International Test Conference
POIROT1: A Logic Fault Diagnosis Tool and Its Applications

ITC '00 Proceedings of the 2000 IEEE International Test Conference
DIAGNOSIS OF BRIDGING FAULTS IN SEQUENTIAL CIRCUITS USING ADAPTIVE SIMULATION, STATE STORAGE, AND PATH-TRACING

ITC '97 Proceedings of the 1997 IEEE International Test Conference
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations

IEEE Transactions on Computers
Embedded fault diagnosis in digital systems with BIST

Microprocessors & Microsystems
Reducing fault dictionary size for million-gate large circuits

ACM Transactions on Design Automation of Electronic Systems (TODAES)
BLoG: post-silicon bug localization in processors using bug localization graphs

Proceedings of the 47th Design Automation Conference
Diagnostic Test Set Minimization and Full-Response Fault Dictionary

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

A dynamic diagnosis scheme for synchronous sequential circuits is proposed. In contrast with schemes like fault dictionaries no prior computation and storage of fault symptoms is performed. The technique combines cause-effect and effect-cause strategies. Cause-effect analysis is performed by single stuck at fault simulation followed by a matching algorithm. Effect-cause analysis is performed by an error propagation back-trace starting from the falling outputs. The error propagation back-trace eliminates from consideration faults that could not have caused the failing symptoms. The procedure is exact for defects behaving as single stuck-at faults. Experimental results are provided for the ISCAS89 benchmark circuits.