Introduction to algorithms
On the generation of small dictionaries for fault location
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
HOPE: an efficient parallel fault simulator for synchronous sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Algorithms for IDDQ measurement based diagnosis of bridging faults
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Fault dictionary compaction by output sequence removal
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits
IEEE Transactions on Computers
Fault dictionary compression and equivalence class computation for sequential circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Algorithms to compute bridging fault coverage of IDDQ test sets
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dynamic fault diagnosis on reconfigurable hardware
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Fundamentals of Data Structures in C++
Fundamentals of Data Structures in C++
Dynamic diagnosis of sequential circuits based on stuck-at faults
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Fault Dictionary Size Reduction through Test Response Superposition
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
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In general, fault dictionary is prevented from practical applications in fault diagnosis due to its extremely large size. Several previous works are proposed for the fault dictionary size reduction. However, some of them fail to bring down the size to an acceptable level, and others might not be able to handle today's million-gate circuits due to their high time and space complexity. In this article, an algorithm is presented to reduce the size of pass-fail dictionary while still preserving high diagnostic resolution. The proposed algorithm possesses low time and space complexity by avoiding constructing the huge distinguishability table, which inevitably boosts up the required computation complexity. Experimental results demonstrate that the proposed algorithm is capable of handling industrial million-gate large circuits in a reasonable amount of runtime and memory.