Delay fault diagnosis in sequential circuits based on path tracing
Integration, the VLSI Journal
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The authors propose a new diagnosis technique based on path tracing, which diagnoses fault locations in a sequential circuit by extracting combinational circuit blocks dynamically and tracing error propagation paths from failed primary outputs to fault origins. The dynamic circuit extraction reduces analysis area, which is suitable for a large circuit. By applying this technique to several ISCAS'89 benchmark circuits, the authors demonstrated that this technique could localize faults into 20 candidates within four hours.