E-PROOFS: a CMOS bridging fault simulator
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Diagnosis of leakage faults with IDDQ
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Algorithms for IDDQ measurement based diagnosis of bridging faults
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Failure Diagnosis of Structured VLSI
IEEE Design & Test
Test Generation for Current Testing (CMOS ICs)
IEEE Design & Test
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Fault Location with Current Monitoring
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Fast and Accurate CMOS Bridging Fault Simulation
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Compact test generation for bridging faults under I/sub DDQ/ testing
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays
IEEE Transactions on Computers
On the Adaptation of Viterbi Algorithm for Diagnosis of Multiple Bridging Faults
IEEE Transactions on Computers
Experimental Results on BIC Sensors for Transient Current Testing
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Diagnosis Method Using ΔIDDQ Probabilistic Signatures: Theory and Results
Journal of Electronic Testing: Theory and Applications
On effective IDDQ Testing of low-voltage CMOS circuits using leakage control techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fault Detection and Location Using IDD Waveform Analysis
IEEE Design & Test
Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Diagnosis method based on /spl Delta/Iddq probabilistic signatures: experimental results
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Analyzing the Need for ATPG Targeting GOS Defects
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
On Effective IDDQ Testing of Low Voltage CMOS Circuits Using Leakage Control Techniques
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Journal of Electronic Testing: Theory and Applications
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Realistic faults must be targeted if high-quality test and diagnosis of CMOS circuits are desired. We propose a strategy to generate high-quality IDDQ test patterns for bridging faults (BFs). We used a standard ATPG for stuck-at faults that adequately adapts to target bridging faults by IDDQ testing. The methodology applies to both combinational and sequential circuits using scan-path structures. We discuss the diagnosis capability of IDDQ test sets, as well as the addition of specifically generated vectors to improve diagnosability. Results on both test and diagnosis are provided for benchmark circuits.