Diagnosis of leakage faults with IDDQ
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Algorithms for IDDQ measurement based diagnosis of bridging faults
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Identifying defects in deep-submicron CMOS ICs
IEEE Spectrum
Failure Diagnosis of Structured VLSI
IEEE Design & Test
IDDQ Test and Diagnosis of CMOS Circuits
IEEE Design & Test
IC Failure Analysis: Magic, Mystery, and Science
IEEE Design & Test
Diagnosing IC Failures in a Fast Environment
IEEE Design & Test
IC Failure Analysis: The Importance of Test and Diagnostics
IEEE Design & Test
Automated Diagnosis in Testing and Failure Analysis
IEEE Design & Test
Modeling the Unmodelable: Algorithmic Fault Diagnosis
IEEE Design & Test
Increasing Current Testing Resolution
DFT '98 Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems
On the Current Behavior of Faulty and Fault-Free ICs and the Impact on Diagnosis
DFT '98 Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems
IDDQ Test: Sensitivity Analysis of Scaling
Proceedings of the IEEE International Test Conference on Test and Design Validity
Fault Location with Current Monitoring
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Application and Analysis of IDDQ Diagnostic Software
Proceedings of the IEEE International Test Conference
Current Signatures: Application
Proceedings of the IEEE International Test Conference
Bridging Defects Resistance Measurements in a CMOS Process
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Diagnostic techniques for the UltraSPARC microprocessors
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Failure analysis of timing and IDDq-only failures from the SEMATECH test methods experiment
ITC '98 Proceedings of the 1998 IEEE International Test Conference
On applying non-classical defect models to automated diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Modeling the unknown! Towards model-independent fault and error diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Probabilistic mixed-model fault diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A diagnostic test generation procedure for synchronous sequential circuits based on test elimination
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A new path-oriented effect-cause methodology to diagnose delay failures
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Diagnosis method based on /spl Delta/Iddq probabilistic signatures: experimental results
ITC '98 Proceedings of the 1998 IEEE International Test Conference
ATS '95 Proceedings of the 4th Asian Test Symposium
A novel built-in current sensor for I/sub DDQ/ testing of deep submicron CMOS ICs
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Current signatures [VLSI circuit testing]
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
On the Comparison of IDDQ and IDDQ Testing
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Studies of the SEMATECH IDDq test data
Journal of Systems Architecture: the EUROMICRO Journal - Defect and fault tolerance in VLSI Systems
Diagnosis of integrated circuits with multiple defects of arbitrary characteristics
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
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This paper proposes a very efficient method to diagnosis multiple bridging faults. This method is based on differential or Delta ${\rm I}_{DDQ}$ probabilistic signatures, as well as on the Viterbi algorithm, mainly used in telecommunications systems for error correction. The proposed method can be seen as a significant improvement over an existing one based on maximum likelihood estimation. The use of the (adapted) Viterbi algorithm allows us to take into account additional information not considered previously. The existing and the proposed method are first described. Then, simulation and experimental results are presented to validate the concept in the context of double faults. Bounds on false diagnosis probability are also provided, estimating the number of test/diagnosis vectors required to reach a given diagnosis reliability for a given number of gates. The bounds allow us to show that this probability exponentially decreases with the number of test vectors and that for, a given value of this probability, the number of vectors required is O(log2(G)), where G is the number of gates.