Structured Logic Testing
Finding Defects with Fault Models
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Fault Location with Current Monitoring
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
On the Adaptation of Viterbi Algorithm for Diagnosis of Multiple Bridging Faults
IEEE Transactions on Computers
Diagnosis and characterization of timing-related defects by time-dependent light emission
ITC '98 Proceedings of the 1998 IEEE International Test Conference
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Diagnostic Test Generation for Sequential Circuits
ITC '00 Proceedings of the 2000 IEEE International Test Conference
APPLICATION AND ANALYSIS OF IDDQ DIAGNOSTIC SOFTWARE
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Diagnostic Techniques for the IBM S/390 600 MHz G5 Microprocessor
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Interactive presentation: Low cost debug architecture using lossy compression for silicon debug
Proceedings of the conference on Design, automation and test in Europe
S/390 G5 CMOS microprocessor diagnostics
IBM Journal of Research and Development
Real-time lossless compression for silicon debug
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Embedded debug architecture for bypassing blocking bugs during post-silicon validation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper reviews the logic failure analysis process and emphasizes the critical need for fault localization using software-based diagnostics. Continuous improvements in yield, reliability, time- to-market, and customer satisfaction all depend on quick corrective-action implementation through root cause failure analysis. Fault localization is the first and most critical step in the failure analysis process. This paper reviews the two primary localization methods: software-based diagnostics such as scan, and hardware diagnostics adapted to the back side of the die. Software diagnostics are emphasized as the method of choice with hardware diagnostics limited to a complementary role because of reduced coverage of defect types.