E-PROOFS: a CMOS bridging fault simulator
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Finding Defects with Fault Models
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Beyond the Byzantine Generals: Unexpected Behaviour and Bridging Fault Diagnosis
Proceedings of the IEEE International Test Conference on Test and Design Validity
Bridging Defects Resistance Measurements in a CMOS Process
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Signature Analysis for IC Diagnosis and Failure Analysis
Proceedings of the IEEE International Test Conference
Biased Voting: A Method for Simulating CMOS Bridging Faults in the Presence of Variable Gate Logic
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Improving the accuracy of diagnostics provided by fault dictionaries
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Diagnosing realistic bridging faults with single stuck-at information
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the Adaptation of Viterbi Algorithm for Diagnosis of Multiple Bridging Faults
IEEE Transactions on Computers
On applying non-classical defect models to automated diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
IC diagnosis: preventing wars and war stories
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Computer-Aided Fault to Defect Mapping (CAFDM) for Defect Diagnosis
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Diagnostic Test Generation for Sequential Circuits
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Eliminating the Ouija® Board: Automatic Thresholds and Probabilistic IDDQ Diagnosis
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Error Diagnosis of Sequential Circuits Using Region-Based Model
Journal of Electronic Testing: Theory and Applications
Fault Diagnosis and Fault Model Aliasing
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Adaptive Debug and Diagnosis Without Fault Dictionaries
Journal of Electronic Testing: Theory and Applications
Selection of a fault model for fault diagnosis based on unique responses
Proceedings of the Conference on Design, Automation and Test in Europe
On undetectable faults and fault diagnosis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Selection of a fault model for fault diagnosis based on unique responses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Diagnosis of transition fault clusters
Proceedings of the 48th Design Automation Conference
On candidate fault sets for fault diagnosis and dominance graphs of equivalence classes
Proceedings of the Conference on Design, Automation and Test in Europe
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Previously-proposed strategies for VLSI fault diagnosishave suffered from a variet y of self-imposed limitations.Some techniques are limited to a specific fault model, andmany will fail in the face of any unmodeled behavior orunexpected data. Others apply ad-hoc or arbitrary scoring mechanisms to fault candidates, making the resultsdifficult to interpret or to compare with the results fromother algorithms. This paper outlines an approach to faultdiagnosis that is robust, comprehensive, extendable, andpractical. By introducing a probabilistic framework fordiagnostic prediction, it is designed to incorporate disparate diagnostic algorithms, different sets of data, anda mixture of fault models into a single diagnostic result.Results from diagnosis experiments on a Hewlett-PackardASIC and FIB'd defects are presented.