An indirect current sensing technique for IDDQ and IDDT tests

  • Authors:
  • Chuen-Song Chen;Jien-Chung Lo;Tian Xia

  • Affiliations:
  • University of Rhode Island, Kingston, RI;University of Rhode Island, Kingston, RI;University of Vermont, Burlington, VT

  • Venue:
  • GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
  • Year:
  • 2006

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Abstract

An indirect current sensing technique for IDDQ and IDDT tests is proposed in this paper. This is accomplished by utilizing the pervasive on-chip voltage regulators and thus have little or no impact on CUT's design and its performance. We demonstrate that the proposed technique can be applied to both IDDQ and IDDT tests. Experiments were successfully conducted in SPICE simulations assuming the TSMC 0.18μm CMOS technology.