Design of High-Speed and Cost-Effective Self-Testing Checkers for Low-Cost Arithmetic Codes
IEEE Transactions on Computers
Design and performance of the IBM Enterprise System/900 Type 9121 Vector Facility
IBM Journal of Research and Development
Efficient Encoding? Decoding Circuitry for Systematic Unidirectional Error-Detecting Codes
Proceedings of the 5th International GI/ITG/GMA Conference on Fault-Tolerant Computing Systems, Tests, Diagnosis, Fault Treatment
Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters
Journal of Electronic Testing: Theory and Applications - Special issue on On-line testing
On Concurrent Error Detection with Bounded Latency in FSMs
Proceedings of the conference on Design, automation and test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation
Journal of Electronic Testing: Theory and Applications
On the Design of Self-Checking Controllers with Datapath Interactions
IEEE Transactions on Computers
Dependable design technique for system-on-chip
Journal of Systems Architecture: the EUROMICRO Journal
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This article surveys research activities in on-line hardware-checking techniques developed in Eastern Europe including the former Soviet Union. It presents some interesting results on self-checking circuit design, many of which are unknown to Western researchers as they appeared in not-so-widely known journals and conference proceedings. Much of the work is new and is judged to be a significant contribution to the field. Among the traditional designs intended for synchronous circuits are some state-of-the-art self-testing checkers, new error detecting unordered codes that are an extension of Berger codes, self-checking combinational circuits using parity, and several designs of totally self-checking synchronous sequential circuits. Included also are the first-ever design concepts of totally self-checking asynchronous circuits.