Adaptive Multiuser Online Reconfigurable Engine

Authors:
Daler N. Rakhmatov;Sarma B. K. Vrudhula;Thomas J. Brown;Ajay Nagarandal
Affiliations:
-;-;-;-
Venue:
IEEE Design & Test
Year:
2000

Citing 17
Cited 3

Variable sized bin packing

SIAM Journal on Computing
An efficient approximation scheme for variable-sized bin packing

SIAM Journal on Computing
Algorithms for clustering data

Algorithms for clustering data
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints

ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Sequencing run-time reconfigured hardware with software

Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Fast module mapping and placement for datapaths in FPGAs

FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Low overhead fault-tolerant FPGA systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Space-time scheduling of instruction-level parallelism on a raw machine

Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Data Structures: Theory and Practice

Data Structures: Theory and Practice
Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement

FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Stream synthesis for a wormhole run-time reconfigurable platform

FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Instruction-Level Parallelism for Reconfigurable Computing

FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Architectural Synthesis Techniques for Dynamically Reconfigurable Logic

FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
BIST-Based Diagnostics of FPGA Logic Blocks

Proceedings of the IEEE International Test Conference
The Chimaera reconfigurable functional unit

FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Specifying and Compiling Applications for RaPiD

FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
A Low Cost Approach for Detecting, Locating, and Avoiding Interconnect Faults in FPGA-Based Reconfigurable Systems

VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'

Minimizing routing configuration cost in dynamically reconfigurable FPGAs

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
New design methodology with efficient prediction of quality metrics for logic level design towards dynamic reconfigurable logic

Journal of Systems Architecture: the EUROMICRO Journal
Using simulated partial dynamic run-time reconfiguration to share embedded FPGA compute and power resources across a swarm of unpiloted airborne vehicles

EURASIP Journal on Embedded Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

We describe an adaptive multiuser computing platform under development. We focus on the two major components of its software infrastructure: hardware clustering and I/O scheduling