Specifying and Compiling Applications for RaPiD

Fast compilation for pipelined reconfigurable fabrics

FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays

PipeRench: a co/processor for streaming multimedia acceleration

ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture

CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit

Proceedings of the 27th annual international symposium on Computer architecture

Flexible hardware acceleration for multimedia oriented microprocessors

Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture

Matching and searching analysis for parallel hardware implementation on FPGAs

FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays

Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks

Proceedings of the conference on Design, automation and test in Europe

Automatic Compilation of Loops to Exploit Operator Parallelism on Configurable Arithmetic Logic Units

IEEE Transactions on Parallel and Distributed Systems

Reconfigurable computing: a survey of systems and software

ACM Computing Surveys (CSUR)

A compiler approach to fast hardware design space exploration in FPGA-based systems

PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation

Exploiting operation level parallelism through dynamically reconfigurable datapaths

Proceedings of the 39th annual Design Automation Conference

Adaptive Multiuser Online Reconfigurable Engine

IEEE Design & Test

Reconfigurable Instruction Set Processors from a Hardware/Software Perspective

IEEE Transactions on Software Engineering

Flexible Routing Architecture Generation for Domain-Specific Reconfigurable Subsystems

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Architecture Design of Reconfigurable Pipelined Datapaths

ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI

Pipeline Vectorization for Reconfigurable Systems

FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines

FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines

A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems

FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines

Power-efficient flexible processor architecture for embedded applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)

Mapping of generalized template matching onto reconfigurable computers

IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)

A scalable wide-issue clustered VLIW with a reconfigurable interconnect

Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

Custom Wide Counterflow Pipelines for High-Performance Embedded Applications

IEEE Transactions on Computers

Exploration of pipelined FPGA interconnect structures

FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays

Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor

Proceedings of the 31st annual international symposium on Computer architecture

Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture

IEEE Transactions on Computers

Evaluating heuristics in automatically mapping multi-loop applications to FPGAs

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays

Automatic Design of Area-Efficient Configurable ASIC Cores

IEEE Transactions on Computers

Rapid VLIW processor customization for signal processing applications using combinational hardware functions

EURASIP Journal on Applied Signal Processing

CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays

A stochastic bitwidth estimation technique for compact and low-power custom processors

ACM Transactions on Embedded Computing Systems (TECS)

Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder

Journal of Signal Processing Systems

The input-aware dynamic adaptation of area and performance for reconfigurable accelerator

Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays

Compiling for reconfigurable computing: A survey

ACM Computing Surveys (CSUR)

Bridging the gap between compilation and synthesis in the DEFACTO system

LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing

Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing