A MATLAB to Fortran 90 translator and its effectiveness
ICS '96 Proceedings of the 10th international conference on Supercomputing
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
IEEE Transactions on Computers
Compiling MATLAB Programs to ScaLAPACK: Exploiting Task and Data Parallelism
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
PARADIGM (version 2.0): A New HPF Compilation System
IPPS '99/SPDP '99 Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing
The Chimaera reconfigurable functional unit
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Specifying and Compiling Applications for RaPiD
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
NAPA C: Compiling for a Hybrid RISC/FPGA Architecture
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
The NAPA Adaptive Processing Architecture
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
MultiMATLAB: MATLAB on Multiple Processors
MultiMATLAB: MATLAB on Multiple Processors
The Transmogrifier C hardware description language and compiler for FPGAs
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Results from a Parallel MATLAB Compiler
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Rapid Development of Real-Time Systems using RTExpress(tm)
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardware
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Matching and searching analysis for parallel hardware implementation on FPGAs
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Evaluation of the streams-C C-to-FPGA compiler: an applications perspective
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
Mapping a Single Assignment Programming Language to Reconfigurable Systems
The Journal of Supercomputing
A system for synthesizing optimized FPGA hardware from MATLAB
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Compilation for FPGA-Based Reconfigurable Hardware
IEEE Design & Test
FPGA resource and timing estimation from Matlab execution traces
Proceedings of the tenth international symposium on Hardware/software codesign
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Bandwidth Management with a Reconfigurable Data Cache
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Extracting Speedup From C-Code With Poor Instruction-Level Parallelism
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
Précis: A Usercentric Word-Length Optimization Tool
IEEE Design & Test
Towards a visual notation for pipelining in a visual programming language for programming FPGAs
CHINZ '06 Proceedings of the 7th ACM SIGCHI New Zealand chapter's international conference on Computer-human interaction: design centered HCI
Reducing power while increasing performance with supercisc
ACM Transactions on Embedded Computing Systems (TECS)
A rapid prototyping environment for wireless communication embedded systems
EURASIP Journal on Applied Signal Processing
A visual environment for real-time image processing in hardware (VERTIPH)
EURASIP Journal on Embedded Systems
EURASIP Journal on Applied Signal Processing
Mapping streaming architectures on reconfigurable platforms
ACM SIGARCH Computer Architecture News - Special issue on the 2006 reconfigurable and adaptive architecture workshop
Journal of Parallel and Distributed Computing
A design automation and power estimation flow for RFID systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Compiling for reconfigurable computing: A survey
ACM Computing Surveys (CSUR)
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Quipu: A Statistical Model for Predicting Hardware Resources
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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Recently, high-level languages such as MATLAB have become popular in prototyping algorithms in domains such as signal and image processing. Many of these applications whose subtasks have diverse execution requirements, often employ distributed, heterogeneous, reconfigurable systems. These systems consist of an interconnected set of heterogeneous processing resources that provide a variety of architectural capabilities. The objective of the MATCH (MATlab Compiler for Heterogeneous computing systems) compiler project at Northwestern University is to make it easier for the users to develop efficient code for distributed, heterogeneous, reconfigurable computing systems. Towards this end, we are implementing and evaluating an experimental prototype of a software system that will take MATLAB descriptions of various applications, and automatically map them on to a distributed computing environment consisting of embedded processors, digital signal processors and field-programmable gate arrays built from commercial off-the-shelf components. In this paper, we provide an overview of the MATCH compiler and discuss the testbed, which is being used to demonstrate our ideas of the MATCH compiler. We present preliminary experimental results on some benchmark MATLAB programs with the use of the MATCH compiler.