Introduction to algorithms
Behavioral synthesis: digital system design using the synopsys behavioral compiler
Behavioral synthesis: digital system design using the synopsys behavioral compiler
An approximate timing analysis method for datapath circuits
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Circuits and Technology for Digital's StrongARM(tm) and ALPHA Microprocessors
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Extraction of functional regularity in datapath circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Network flow based datapath bit slicing
Proceedings of the 2013 ACM international symposium on International symposium on physical design
LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs
Proceedings of the International Conference on Computer-Aided Design
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This methodology extracts the regularity of data path blocks from their HDL descriptions and preserves it throughout the synthesis process. By automating various design steps, the methodology significantly improves design productivity and achieves designs comparable in terms of delay and size to manually designed circuits.