IEEE Transactions on Computers
A Fault-Tolerant FFT Processor
IEEE Transactions on Computers
Algorithm-Based Fault Detection for Signal Processing Applications
IEEE Transactions on Computers
A Novel Concurrent Error Detection Scheme for FFT Networks
IEEE Transactions on Parallel and Distributed Systems
Efficient FFT network testing and diagnosis schemes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Concurrent Error Detection in Fast Unitary Transform Algorithms
DSN '01 Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS)
Concurrent Error Detection in Wavelet Lifting Transforms
IEEE Transactions on Computers
A study of application-level recovery methods for transient network faults
ScalA '13 Proceedings of the Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems
| Hi-index | 14.98 |
In this brief contribution a new algorithm-based concurrent error detection scheme employing the checksum approach is proposed for FFT networks. Our design allows high error coverage with low false alarm rate by applying the linear weight factors to the checksums. Due to the simplicity, the hardware overhead is relatively small and errors can be quickly detected. The design is also shown to be easily expanded for multidimensional FFT networks.