On static compaction of test sequences for synchronous sequential circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Static compaction using overlapped restoration and segment pruning
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Proptest: a property based test pattern generator for sequential circuits using test compaction
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Procedures for Static Compaction of Test Sequences for Synchronous Sequential Circuits
IEEE Transactions on Computers
State relaxation based subsequence removal for fast static compaction in sequential circuits
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Static test sequence compaction based on segment reordering and accelerated vector restoration
ITC '98 Proceedings of the 1998 IEEE International Test Conference
On Speeding-Up Vector Restoration Based Static Compaction of Test Sequences for Sequential Circuits
ATS '98 Proceedings of the 7th Asian Test Symposium
Sequential Circuit Test Generation Using Dynamic State Traversal
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Vector restoration based static compaction of test sequences for synchronous sequential circuits
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Static test compaction for synchronous sequential circuits based on vector restoration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We describe a method to improve the levels of compaction achievable by static compaction procedures based on vector omission. Such procedures are used to reduce the lengths of test sequences for synchronous sequential circuits without reducing the fault coverage. The proposed procedure enumerates, in increasing chronological order, test sequences consisting of subsets of the vectors included in a given test sequence that needs to be compacted. The unique feature of this approach is that test vectors omitted from the test sequence at an earlier iteration can be reintroduced at a later iteration. This results in a less greedy procedure and helps reduce the compacted test sequence length beyond the length that can be achieved if vectors are omitted permanently as in earlier procedures.