Procedures for static compaction of test sequences for synchronous sequential circuits based on vector restoration

Authors:
R. Guo;I. Pomeranz;S. M. Reddy
Affiliations:
Electrical and Computer Engineering Department, University of Iowa, Iowa City, IA;Electrical and Computer Engineering Department, University of Iowa, Iowa City, IA;Electrical and Computer Engineering Department, University of Iowa, Iowa City, IA
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
1998

Citing 8
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Abstract

We propose several compaction procedures for synchronous sequential circuits based on test vector restoration. Under a vector restoration procedure, all or most of the test vectors are first omitted from the test sequence. Test vectors are then restored one at a time or in subsequences only as necessary to restore the fault coverage of the original sequence. Techniques to speed-up the restoration process are investigated. These include limiting the test vectors initially omitted from the test sequence, consideration of several faults in parallel during restoration, and the use of a parallel fault simulator.