HOPE: an efficient parallel fault simulator for synchronous sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Rapid diagnostic fault simulation of stuck-at faults in sequential circuits using compact lists
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
On generating compact test sequences for synchronous sequential circuits
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
On static compaction of test sequences for synchronous sequential circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Simulation-based techniques for dynamic test sequence compaction
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
On Dictionary-Based Fault Location in Digital Logic Circuits
IEEE Transactions on Computers
New methods of improving parallel fault simulation in synchronous sequential circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fault dictionary compression and equivalence class computation for sequential circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
COMPACTEST-II: a method to generate compact two-pattern test sets for combinational logic circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
A Diagnostic Test Generation Procedure for Combinational Circuits Based on Test Elimination
ATS '98 Proceedings of the 7th Asian Test Symposium
On Speeding-Up Vector Restoration Based Static Compaction of Test Sequences for Sequential Circuits
ATS '98 Proceedings of the 7th Asian Test Symposium
Sequential Circuit Test Generation Using Dynamic State Traversal
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Vector restoration based static compaction of test sequences for synchronous sequential circuits
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
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The effect of test compaction on fault diagnosis isexperimentally investigated. Results for combinational andsequential circuits indicate that the diagnostic resolutionachieved by compacted tests is only minimally lower thanthat for uncompacted tests. Furthermore, the diagnosticresolution of the compacted tests can be enhanced to bethe same or better than that for the uncompacted testswhile still retaining compactness.