Loop skewing: the wavefront method revisited
International Journal of Parallel Programming
Compiler Optimizations for Enhancing Parallelism and Their Impact on Architecture Design
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors
IEEE Transactions on Computers
Time Optimal Linear Schedules for Algorithms with Uniform Dependencies
IEEE Transactions on Computers
Independent Partitioning of Algorithms with Uniform Dependencies
IEEE Transactions on Computers
The Organization of Computations for Uniform Recurrence Equations
Journal of the ACM (JACM)
The parallel execution of DO loops
Communications of the ACM
Optimizing Supercompilers for Supercomputers
Optimizing Supercompilers for Supercomputers
Parallel Programming and Compilers
Parallel Programming and Compilers
On Time Mapping of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays
IEEE Transactions on Parallel and Distributed Systems
Loop Coalescing and Scheduling for Barrier MIMD Architectures
IEEE Transactions on Parallel and Distributed Systems
Journal of VLSI Signal Processing Systems
A Unifying Lattice-Based Approach for the Partitioning of Systolic Arrays via LPGS and LSGP
Journal of VLSI Signal Processing Systems
Journal of VLSI Signal Processing Systems
A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays
Journal of VLSI Signal Processing Systems
Profiling Dependence Vectors for Loop Parallelization
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Ground Water Flow Modelling in PVM
Proceedings of the 6th European PVM/MPI Users' Group Meeting on Recent Advances in Parallel Virtual Machine and Message Passing Interface
Extracting Parallelism in Nested Loops
COMPSAC '96 Proceedings of the 20th Conference on Computer Software and Applications
Exploitation of parallelism to nested loops with dependence cycles
Journal of Systems Architecture: the EUROMICRO Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimal loop parallelization for maximizing iteration-level parallelism
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
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This paper describes several loop transformation techniques for extracting parallelism from nested loop structures. Nested loops can then be scheduled to run in parallel so thatexecution time is minimized. One technique is called selective cycle shrinking, and theother is called true dependence cycle shrinking. It is shown how selective shrinking isrelated to linear scheduling of nested loops and how true dependence shrinking is relatedto conflict-free mappings of higher dimensional algorithms into lower dimensionalprocessor arrays. Methods are proposed in this paper to find the selective and truedependence shrinkings with minimum total execution time by applying the techniques offinding optimal linear schedules and optimal and conflict-free mappings proposed by W.Shang and A.B. Fortes.