A measurement-based model for workload dependence of CPU errors
IEEE Transactions on Computers - The MIT Press scientific computation series
Chip-level modeling with VHDL
Fault Injection for Dependability Validation: A Methodology and Some Applications
IEEE Transactions on Software Engineering
FINE: A Fault Injection and Monitoring Environment for Tracing the UNIX System Behavior Under Faults
IEEE Transactions on Software Engineering - Special issue on software reliability
Computer
A Fault Injection Technique for VHDL Behavioral-Level Models
IEEE Design & Test
FOCUS: An Experimental Environment for Fault Sensitivity Analysis
IEEE Transactions on Computers
Fault Injection and Dependability Evaluation of Fault-Tolerant Systems
IEEE Transactions on Computers
Experimental Validation of High-Speed Fault-Tolerant Systems Using Physical Fault Injection
DCCA '99 Proceedings of the conference on Dependable Computing for Critical Applications
Assessment of COTS Microkernels by Fault Injection
DCCA '99 Proceedings of the conference on Dependable Computing for Critical Applications
A Comparison of Simulation Based and Scan Chain Implemented Fault Injection
FTCS '98 Proceedings of the The Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing
Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
New Techniques for Accelerating Fault Injection in VHDL Descriptions
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
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This work presents a campaign of fault injection to validate the dependability of a fault tolerant microcomputer system. The system is duplex with cold stand-by sparing, parity detection and a watchdog timer. The faults have been injected on a chip-level VHDL model, using an injection tool designed with this purpose. We have carried out a set of injection experiments (with 3000 injections each), injecting transient and permanent faults of types stuck-at, open-line and indetermination on both the signals and variables of the system, running a workload. We have analysed the pathology of the propagated errors, measured their latency, and calculated both detection and recovery coverage. We have also studied the influence with the fault duration and fault distribution. For instance, system detection coverage (including noneffective faults) is 98% and the system recovery coverage is 95% for short transient faults (0.1 clock cycles).