Espresso-HF: a heuristic hazard-free minimizer for two-level logic
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Practical advances in asynchronous design and in asynchronous/synchronous interfaces
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
What is the cost of delay insensitivity?
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
High-Performance Asynchronous Pipeline Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Proceedings of the 41st annual Design Automation Conference
Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Verification and implementation of delay-insensitive processes in restrictive environments
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
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We describe the design of a high performance asynchronous SCSI (small computer systems interface) controller data path and the associated control circuits. The data path is an asynchronous pipeline and the control circuits for the data path are built out of extended burst-mode machines. This design is functionally compatible with a widely used commercial SCSI controller and was simulated correctly with respect to all of the applicable test vectors used for the commercial design. The technology used for this design is a 0.8 /spl mu/m CMOS standard cell. The performance is limited by the SCSI specification, not the design itself, and the area is competitive with the commercial design. This design improves the data transfer throughput by up to 2.5 times from previous work by incorporating a FIFO and a distributed control scheme based on extended burst-mode state machines.